Wednesday, December 31, 2008
Saturday, June 21, 2008
I urge you to be kind to your living parents. On this note, I pay homage to all Mothers.
Saturday, June 21, 7:53PM
Friday, May 30, 2008
I have in the past lamented how slow my research was and was having a second thought about taking up an academic position. With this award, I am all ready to undertake this new endeavor.
Early this year I was turned down for the NRF Research Fellowship when I faced with a group of high caliber and accomplished young researchers who have a long string of credentials to their credit (we are talking about paper in Science/Nature, Patents, Nobel Laureate's advisee, etc). Naturally I was upset and uncertain. With this new support, I am in a more comfortable position to take my research to another height, and hopefully this is a first step towards more grants.
By the way my laptop is in bad condition, I will need to ask for a new one from the school.
Saturday, May 31, 11:34AM
Monday, May 26, 2008
I paid respect in a nearby Temple before heading home. I got off a few stops ahead thinking that I should walk instead of letting bus 199 making a big loop around the campus. Not a wise decision I must tell. It started pouring as soon as I got off and I took shelter at the information booth. It got worse and there was no way I can escape so I waited. Twenty minutes passed and this kind gentleman pulled his car over and asked if he can give me ride. YES was my answer! I did not ask for his name, but he told me he was a former NTU student and he was back to study for external exam. Thanks dude, you were a great help or less I might have to wait for 1 more hour and risking myself of getting cold. The message? Never stop hoping!
I have just returned from Japan one week early and you want to know my biggest impression? The moment I sat on their toilet bowl, I knew this is a truly technological country. If you have been there, you know what I mean!
My laptop has been stalling on me, waiting to get it back from the IT people.
Monday, May 26, 2008, 4:12PM
Tuesday, March 04, 2008
And item # 24 is 3-D with TSVs...
Saturday, February 16, 2008
|United States Patent||7,307,003|
|Reif , et al.||December 11, 2007|
Method of forming a multi-layer semiconductor structure incorporating a processing handle member
A method of forming a multi-layer semiconductor structure includes attaching a handle-member to a top surface of a first structure using a first interface. At least one region of a bottom surface of the first structure is etched to form at least a first via-hole for exposing a portion of a first conductive member defined on the first structure. A conductive material is disposed in the first via-hole such that a first end of the conductive material is in electrical communication with the first conductive member and a second end of the conductive material is exposed at the bottom surface of the first structure. A second interface is disposed over at least the second end of the conductive material, which serves as a bonding and/or electrical interface between the first conductive member defined on the first structure and a second structure of the multi-layer semiconductor device structure.
Tan; Chuan Seng (Cambridge, MA), Fan; Andy (Cambridge, MA)
|Assignee:||Massachusetts Institute of Technology (Cambridge, MA)|
|Filed:||December 30, 2003|
Wednesday, February 13, 2008
為了滿足消費者對電子產品輕薄短小、高效能與多功能的需求，IC構裝已朝三度空間(3 Dimension)之技術發展，而以晶圓級製程(Wafer Level Processing)為基礎的3D整合技術更是日益重要。工研院『先進微系統與構裝技術聯盟;AMPA』有鑑於此，特別邀請新加坡南洋技術大學之Dr. Chuan Seng Tan於2月26日來台，針對晶圓級3D技術平台、製程與應用作詳細報導，內容深入淺出，歡迎從事系統組裝(SMT)、電路板、IC構裝、光電等產業或對此課程有興趣者報名參加！
地 點：工研院9館010會議室 (新竹縣竹東鎮中興路四段195號，電話︰03-5918062)
講 師： Dr. Chuan Seng Tan, Research Fellow, Nanyang Technological University, Singapore
• Dr. Tan received his B.Eng. degree in electrical engineering from University of Malaya, Malaysia, in 1999. Subsequently, he completed his M.Eng. degree in advanced materials from the National University of Singapore under the Singapore-MIT Alliance (SMA) program in 2001.
• In the fall of 2001, he began his doctoral work at the Massachusetts Institute of Technology, Cambridge, USA, and was awarded a Ph.D. degree in electrical engineering in 2006.
• Currently he is a research fellow in Nanyang Technological University, Singapore, under the support of the Lee Kuan Yew Postdoctoral Fellowship.
• He is working on process technology of three-dimensional integrated circuits (3-D ICs). He co-edited a book entitled “Wafer Level 3-D ICs Process Technology,” scheduled to be published by Springer in June 2008.
郵寄地址：新竹縣竹東鎮中興路四段195-4號11館334室 周惠珍 收
‧ 報 名 處：工研院電光所 周惠珍小姐 聯絡電話：03-5918062、傳真：03-5820221